Modeling and Separate Extraction of Gate-Bias- and Channel-Length-Dependent Intrinsic and Extrinsic Source-Drain Resistances in MOSFETsBAE, Hagyoul; JANG, Jaeman; JA SUN SHIN et al.IEEE electron device letters. 2011, Vol 32, Num 6, pp 722-724, issn 0741-3106, 3 p.Article

Enhancement-Mode n-Channel GaN MOSFETs Using HfO₂ as a Gate Oxide : Heterostructure microelectronics with TWHM 2007SUGIURA, Shun; KISHIMOTO, Shigeru; MIZUTANI, Takashi et al.IEICE transactions on electronics. 2008, Vol 91, Num 7, pp 1001-1003, issn 0916-8524, 3 p.Article

High-performance single-crystalline-silicon TFTs on a non-alkali glass substrateSANO, Yasuyuki; TAKEI, Michiko; HARA, Akito et al.IEDm : international electron devices meeting. 2002, pp 565-568, isbn 0-7803-7462-2, 4 p.Conference Paper

Diffusion current and thermal noise in short-channel MOSFETsOBRECHTT, Michael S; MANKU, Tajinder.SPIE proceedings series. 2000, pp 229-234, isbn 0-8194-3900-2Conference Paper

Characterization of sub-100 nm-MOS-transistors processed by optical lithography and a sidewall-etchback techniqueHORSTMANN, J. T; HILLERINGMANN, U; GOSER, K et al.Microelectronic engineering. 1996, Vol 30, Num 1-4, pp 431-434, issn 0167-9317Conference Paper

550 V, N-channel emitter switched thyristors with an atomic-lattice-layout (ALL) geometryBHALLA, A; CHOW, T. P.IEEE electron device letters. 1994, Vol 15, Num 11, pp 452-454, issn 0741-3106Article

Linear networks based on transistorsVITTOZ, E. A; ARREGUIT, X.Electronics Letters. 1993, Vol 29, Num 3, pp 297-299, issn 0013-5194Article

Effects of device layout on the drain breakdown voltages in MuGFETsJIN YOUNG KIM; CHONG GUN YU; JONG TAE PARK et al.Microelectronics and reliability. 2011, Vol 51, Num 9-11, pp 1547-1550, issn 0026-2714, 4 p.Conference Paper

Strained-Si nMOSFET with a raised source/drain structureLIN, H. Y; WU, S. L; CHANG, S. J et al.Semiconductor science and technology. 2009, Vol 24, Num 1, issn 0268-1242, 015015.1-015015.4Article

Change in electrical characteristics of gallium phosphide nanowire transistors under different environmentsDONGHUN KANG; PARK, Wanjun.IEEE conference on nanotechnology. 2004, pp 370-372, isbn 0-7803-8536-5, 1Vol, 3 p.Conference Paper

Neurotransistors for biomedical nanotechnologyMENEZES, A. J; KAPOOR, V. J.Proceedings - Electrochemical Society. 2003, pp 38-47, issn 0161-6374, isbn 1-56677-346-6, 10 p.Conference Paper

Extraction of R_DS(ON) of n-channel power MOSFET by numerical simulation modelSALAME, C.-T.Active and passive electronic components. 2001, Vol 23, Num 4, pp 175-183, issn 0882-7516Article

Empirical model of effective channel length (L_eff) for 0.25 μm LDD nMOSFETLIU, P. C; LIN, H.SPIE proceedings series. 2000, pp 235-242, isbn 0-8194-3900-2Conference Paper

Leakage current reduction due to hot carrier effects in n-channel polycrystalline silicon thin films transistorsTALLARIDA, G; PECORA, A; FORTUNATO, G et al.Journal of non-crystalline solids. 1995, Vol 187, pp 195-198, issn 0022-3093Conference Paper

Bistable field effect transistor (BISFET) : a novel heterostructure deviceOJHA, J. J; SIMMONS, J. G.Electronics Letters. 1993, Vol 29, Num 11, pp 1028-1029, issn 0013-5194Article

Influence of post-stress effects on the dynamic hot-carrier degradation behavior of passivated n-channel MOSFET'sBELLENS, R; DE SCHRIJVER, E; GROESENEKEN, G et al.IEEE electron device letters. 1992, Vol 13, Num 7, pp 357-359, issn 0741-3106Article

Effect of laser light on n-GaAs photoetchingSVORCIK, V; RYBKA, V.Applied physics. A, Solids and surfaces. 1990, Vol 51, Num 1, pp 61-63, issn 0721-7250Article

Location- and Orientation-Controlled (100) and (110) Single-Grain Si TFTs Without Seed SubstrateTAO CHEN; ISHIHARA, Ryoichi; BEENAKKER, Kees et al.I.E.E.E. transactions on electron devices. 2010, Vol 57, Num 9, pp 2348-2352, issn 0018-9383, 5 p.Article

Effects of hot carriers in offset gated polysilicon thin-film transistorsHATZOPOULOS, A. T; TASSIS, D. H; ARPATZANIS, N et al.Microelectronics and reliability. 2006, Vol 46, Num 2-4, pp 311-316, issn 0026-2714, 6 p.Article

A new technique to profile hot-carrier induced interface state generation in nMOSFETs using charge pumpingMAHAPATRA, S; PARIKH, C. D; VASI, J et al.SPIE proceedings series. 1998, pp 1030-1033, isbn 0-8194-2756-X, 2VolConference Paper

MOSFET test structures for two-dimensional device simulationSAHA, S.Solid-state electronics. 1995, Vol 38, Num 1, pp 69-73, issn 0038-1101Article

New processing methods for n-GaAs field effect transistors using neutralisation of shallow donors by hydrogen and dissociation process by UV lightCHING HING, N. N; MEZIERE, S; VALIN, I et al.Electronics Letters. 1995, Vol 31, Num 16, pp 1391-1393, issn 0013-5194Article

A transistor fault model for nMOS combinational circuitsISMAEEL, A. A.Microelectronics journal. 1991, Vol 22, Num 4, pp 15-26, issn 0959-8324Article

Performance of 600-V n-channel IGBT's at low temperaturesCHOW, T. P; SO, K.-C; LAU, D et al.IEEE electron device letters. 1991, Vol 12, Num 9, pp 498-499, issn 0741-3106Article

Mise en évidence d'un potentiel de fluctuations dans les caractéristiques cinétiques des canaux d'inversion n à la surface du silicium. Cas des petites fluctuationsBAJRAMOV, M. A; VEDENEEV, A. S; VOLKOV, L. V et al.Fizika i tehnika poluprovodnikov. 1988, Vol 22, Num 8, pp 1365-1369, issn 0015-3222Article